Does anyone have any experience with tearing artifacts in oled modules? I recall some ssd drivers having some sort for write synchronization but not sure what’s available. Any info appreciated. Thanks
I found the answer in the SSD1306 datasheet https://www.adafruit.com/datasheets/SSD1306.pdf :
The operation clock (CLK) can be generated
either from internal oscillator or external source CL pin.
Set Display Clock Divide Ratio/Oscillator Frequency (D5h)
This command consists of two functions:
Display Clock Divide Ratio (D)(A[3:0])
Set the divide ratio to generate DCLK (Display Clock) from CLK. The divide ratio is from 1 to 16, with reset value = 1. Please refer to section 8.3 for the details relationship of DCLK and CLK.
See also page 23 - “FR synchronization signal can be used to prevent tearing effect.”
@Stefan_Petrick that would just set the frame rate, unfortunately not control sync. I have found an FR pin on these drivers, but no oled maker actually makes then available
@Rob_Bairos My guess is that adjusting the Display Clock Divide Ratio could be useful.
@Stefan_Petrick but two clocks will always drift unless you have a way of forcing one state relative to another. Even so, haven’t found an oled module that breaks out FR or even clock inputs.
“have a way of forcing one state relative to another”
I read that´s exactely, what you can do: choose eigther a independent Oscillator Frequency (which will drift) or set a Display Clock Divide Ratio which then links the the Clock Input to the Display Clock (always synced).
@Stefan_Petrick sorry. Misunderstood your comment earlier. I’ve thought about that approach but no modules make those pins available that I’ve seen. Also your still have to somehow reverse engineer when the display is being updated relative to the clock and command you’re sending it. Wish they made this easier!
@Rob_Bairos sorry. What I understand just now is
that CL and CLS are additional pins which are not available at the modules. I assumed they´re software commands sended via the interface…